1. Field of the Invention
The present invention relates to a structure in the vicinity of wiring of a semiconductor device, particularly to a semiconductor device including a multi-layered wiring structure such as a system LSI and high-speed logic LSI, in which durability of an insulating film of each layer with respect to CMP is enhanced, and a manufacturing method of the device.
2. Description of the Related Art
In recent years, in order to reduce a wiring-RC-delay of an LSI and to enhance a capability of a multi-layered wiring, a wire having low resistance and an insulating film having a low relative dielectric constant have been used. As the material of the wire having the low resistance, for example, copper (Cu) having a resistivity p of about 1.8 μΩcm is used. Moreover, as the insulating film has a low relative dielectric constant, for example, a low-relative-dielectric-constant film (low-k film) is used which contains organic components and whose relative dielectric constant k is about 2.5 or less.
In general, a process of using materials such as Cu, W, and Al to form a so-called damascene wire includes a chemical mechanical polishing (CMP) process. Additionally, since most low-relative-dielectric-constant films have a porous structure, the films are remarkably brittle with respect to mechanical stress (load) in the CMP process. When a low-relative-dielectric-constant film is subjected to CMP, the film itself is destroyed by the mechanical stress, and it is substantially impossible to subject the low-relative-dielectric-constant film directly to the CMP. Therefore, another insulating film including a non-porous structure is usually provided on a low-relative-dielectric-constant film to prevent the low-relative-dielectric-constant film from being destroyed by the CMP.
However, most stacked films including a insulating film and a low-relative-dielectric-constant film have remarkably weak adhesion at an interface. Therefore, when a stacked film is subjected to CMP, the insulating film peels off the low-relative-dielectric-constant film in most cases. When the stacked film is used in a single layer, the film peel at the interface cannot easily occur. However, when the stacked films are laminated in a plurality of layers, the film peel easily occurs at the interface between the layers. Therefore, to realize a multi-layered wiring structure in which interlayer insulating films as the stacked films are laminated in a plurality of layers, a film structure is required in which the adhesion of the films among the layers is stronger than the load of the CMP. Particularly, to form the interlayer insulating films in which the number of layers exceeds ten and which are required in next-generation semiconductor devices such as a system-LSI and high-speed logic-LSI, the film structure in which the adhesion of the films among the layers is larger is required.